This invention relates in general to synchronous rectifiers and, more particularly, to a gate drive circuit for synchronous rectification.
Synchronous rectifiers are commonly used in power conversion systems for reducing a power supply voltage to a usable level. A DC-DC buck converter is one example of such an application, wherein a supply voltage, for example from an automobile battery, must be reduced to a level compatible with electronic components, say 5 VDC.
A conventional buck converter may comprise a field effect transistor (FET) and a low-pass filter serially coupled between a high voltage input terminal and a low voltage output terminal. A rectification diode is coupled between the interconnection of the FET and the low-pass filter and a negative power supply conductor. The gate of the FET is responsive to a pulse-width modulated control signal for passing the high voltage input signal to the rectification diode where it is rectified and low-pass filtered to provide the desired lower voltage output signal.
A principal problem with the aforedescribed conventional buck converter is the losses in the rectification diode due to its relative large forward voltage drop which reduces the efficiency of the voltage conversion. For example, a Schottky rectification diode may develop 400 millivolts of forward bias voltage which is significant compared to a 5 VDC output signal and may reduce the converter efficiency by as much as 8 percent.
Hence, what is needed is an improved synchronous rectifier for improving the efficiency of a power conversion system.